Addressing Intellectual property (IP) security in ICs is an ongoing challenge. In general, IC vendors and end users have many resources invested in developing their IP. Other participants such as the military have even a bigger stake in protecting the secrets of their IP development. Furthermore, there are parties dedicated to gaining access unlawfully to IP cores. So the need to protect the IP is very high priority.
There are many means for an intruder attempting to gain access to an IP of an IC. One method is related to parametric variation, and an example for parametric variation is a rapid change to temperature and/or voltage. Varying parameters is an effective technique to disrupt the normal operation of an IC and render it vulnerable to further incursion. Today there are methods available and being utilized to avoid unauthorized access. An example of a physical means of security implementation is the use fully sealed metal housing or various epoxy coating. These described enclosure methods, however, especially the use of an epoxy, may alter the device performance. Other methods include the use of elaborate temperature, voltage, and power sensors in conjunction with circuitries dedicated to monitor for such parametric shifts. These monitoring methods are effective but they require many external resources and careful planning for an effective implementation.
Therefore, it is desirable to provide circuits and methods that can enable vendors and end users alike to employ an anti tampering strategy with minimal effort to secure their IP from tampering due to parametric variation. It is also desirable to provide a cost effective means to employ such circuits on an IC.